Add name mapping for package Verilog

868a0289 · Tao Chen · 2888fa44 · 868a0289
Commit 868a0289 authored Mar 12, 2013 by Tao Chen
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repositories.json repositories.json +1 -0

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--- a/repositories.json
+++ b/repositories.json
@@ -1451,6 +1451,7 @@
 		"sublime-unittest": "Unittest (python)",
 		"sublime-v8": "Sublime V8",
 		"sublime-vagrant": "Vagrant",
+		"sublime-verilog": "Verilog",
 		"sublime-view-in-browser": "View In Browser",
 		"sublime-view-movement": "View Movement",
 		"Sublime-Wrap-Plus": "Wrap Plus",