instrument · 635059afea3d94c859b15648eda8d411c232d75a · Gaurav Kukreja / hostCompiledSimulation

Combined commit for 2 major changes · 635059af

Gaurav Kukreja authored Sep 21, 2014

 * Added pipeline_sim for simulating pipeline, not completely tested
 * Added Cache HW Mod for Cortex A5.
Signed-off-by: Gaurav Kukreja <gaurav@gauravk.in>

635059af

Name	Last commit	Last update
..
examples		Loading commit data...
.project		Loading commit data...
.pydevproject		Loading commit data...
Makefile		Loading commit data...
__init__.py		Loading commit data...
annotation.py		Loading commit data...
armEmulate.py		Loading commit data...
arm_isa_regex.py		Loading commit data...
cGrammar.py		Loading commit data...
cfg.py		Loading commit data...
cfg_binary.py		Loading commit data...
cfg_isc.py		Loading commit data...
draw_cfg.py		Loading commit data...
gdb_info.py		Loading commit data...
instrument.py		Loading commit data...
irc_regex.py		Loading commit data...
load_store_info.py		Loading commit data...
match_cfg.py		Loading commit data...
pipeline_sim.py		Loading commit data...