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Commit 8d474c07 authored by Gaurav Kukreja's avatar Gaurav Kukreja
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Removing some output files 

Signed-off-by: Gaurav Kukreja's avatarGaurav Kukreja <gaurav@gauravk.in>
parent 64c1f812
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instrument/examples/adpcm/adpcm_IR_ins.c deleted 100644 → 0
View file @ 64c1f812
/***********************************************************
Intermediate representation of
adpcm/app_dir/adpcm.c
Converted by ir2c v0.1
***********************************************************/
#include <limits.h>
#include <stdint.h>
#include "ir2c.h"
/***********************************************************
Copyright 1992 by Stichting Mathematisch Centrum, Amsterdam, The
Netherlands.
All Rights Reserved
Permission to use, copy, modify, and distribute this software and its
documentation for any purpose and without fee is hereby granted,
provided that the above copyright notice appear in all copies and that
both that copyright notice and this permission notice appear in
supporting documentation, and that the names of Stichting Mathematisch
Centrum or CWI not be used in advertising or publicity pertaining to
distribution of the software without specific, written prior permission.
STICHTING MATHEMATISCH CENTRUM DISCLAIMS ALL WARRANTIES WITH REGARD TO
THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS, IN NO EVENT SHALL STICHTING MATHEMATISCH CENTRUM BE LIABLE
FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
******************************************************************/
/*
** Intel/DVI ADPCM coder/decoder.
**
** The algorithm for this coder was taken from the IMA Compatability Project
** proceedings, Vol 2, Number 2; May 1992.
**
** Version 1.2, 18-Dec-92.
**
** Change log:
** - Fixed a stupid bug, where the delta was computed as
** stepsize*code/4 in stead of stepsize*(code+0.5)/4.
** - There was an off-by-one error causing it to pick
** an incorrect delta once in a blue moon.
** - The NODIVMUL define has been removed. Computations are now always done
** using shifts, adds and subtracts. It turned out that, because the standard
** is defined using shift/add/subtract, you needed bits of fixup code
** (because the div/mul simulation using shift/add/sub made some rounding
** errors that real div/mul don't make) and all together the resultant code
** ran slower than just using the shifts all the time.
** - Changed some of the variable names to be more meaningful.
*/
#include "adpcm.h"
#include <stdio.h> /*DBG*/
#ifndef __STDC__
#define signed
#endif
/* Intel ADPCM step variation table */
extern unsigned long SP;
static int indexTable[16] = {
-1, -1, -1, -1, 2, 4, 6, 8,
-1, -1, -1, -1, 2, 4, 6, 8,
};
unsigned long indexTable_addr = 0x9fc;
static int stepsizeTable[89] = {
7, 8, 9, 10, 11, 12, 13, 14, 16, 17,
19, 21, 23, 25, 28, 31, 34, 37, 41, 45,
50, 55, 60, 66, 73, 80, 88, 97, 107, 118,
130, 143, 157, 173, 190, 209, 230, 253, 279, 307,
337, 371, 408, 449, 494, 544, 598, 658, 724, 796,
876, 963, 1060, 1166, 1282, 1411, 1552, 1707, 1878, 2066,
2272, 2499, 2749, 3024, 3327, 3660, 4026, 4428, 4871, 5358,
5894, 6484, 7132, 7845, 8630, 9493, 10442, 11487, 12635, 13899,
15289, 16818, 18500, 20350, 22385, 24623, 27086, 29794, 32767
};
unsigned long stepsizeTable_addr = 0x898;
void adpcm_coder (short indata[], unsigned long indata_addr, char outdata[], unsigned long outdata_addr, int len, struct adpcm_state *state, unsigned long state_addr)
int valpred_41;
int index_40;
int index_38;
int delta_37;
int step_36;
int step_35;
int valpred_34;
uintptr_t ivtmp_28;
int bufferstep;
int outputbuffer;
unsigned long outputbuffer_addr = 0x8;
int index;
int vpdiff;
int valpred;
int step;
int diff;
int delta;
int sign;
signed char * outp;
unsigned long outp_addr = 0x0;
adpcm_coderbb_2:
// # PRED: ENTRY [100.0%] (fallthru,exec)
simDCache((SP + 0x4), 1); // Spilling Register
simDCache((SP + 0xc), 1); // Spilling Register
simDCache((SP + 0xc), 1); // Reading Spilt Register
simICache(0x4a8, 1); // PC Relative Load
// TODO: UnmappedLS: Load GlobalVar coder_1_state at line 247
// TODO: UnmappedLS: Load GlobalVar coder_1_state at line 249
valpred = state->valprev;
simDCache(state_addr, 1);
index = state->index;
simDCache(state_addr, 1);
step = stepsizeTable[index];
simDCache(stepsizeTable_addr + (4 * (index)), 1);
if (len > 0)
goto adpcm_coderbb_3;
else
goto adpcm_coderbb_21;
// # SUCC: 3 [91.0%] (true,exec) 21 [9.0%] (false,exec)
adpcm_coderbb_3:
// # PRED: 2 [91.0%] (true,exec)
simICache(0x4a8, 1); // PC Relative Load
outp = outdata;
simDCache(outdata_addr, 1);
simDCache(outp_addr, 0);
ivtmp_28 = 0;
bufferstep = 1;
// # SUCC: 4 [100.0%] (fallthru,exec)
adpcm_coderbb_4:
// # PRED: 18 [91.0%] (true,exec) 3 [100.0%] (fallthru,exec)
simDCache((SP + 0x4), 1); // Reading Spilt Register
diff = (int) *(short int *)((uintptr_t)indata + (uintptr_t)ivtmp_28) - valpred;
simDCache(indata_addr + (sizeof(short ) * (+ivtmp_28)), 1);
if (diff < 0)
goto adpcm_coderbb_5;
else
goto adpcm_coderbb_22;
// # SUCC: 5 [27.0%] (true,exec) 22 [73.0%] (false,exec)
adpcm_coderbb_22:
// # PRED: 4 [73.0%] (false,exec)
sign = 0;
goto adpcm_coderbb_6;
// # SUCC: 6 [100.0%] (fallthru)
adpcm_coderbb_5:
// # PRED: 4 [27.0%] (true,exec)
diff = -diff;
sign = 8;
// # SUCC: 6 [100.0%] (fallthru,exec)
adpcm_coderbb_6:
// # PRED: 22 [100.0%] (fallthru) 5 [100.0%] (fallthru,exec)
vpdiff = step >> 3;
if (diff >= step)
goto adpcm_coderbb_7;
else
goto adpcm_coderbb_23;
// # SUCC: 7 [50.0%] (true,exec) 23 [50.0%] (false,exec)
adpcm_coderbb_23:
// # PRED: 6 [50.0%] (false,exec)
delta = 0;
goto adpcm_coderbb_8;
// # SUCC: 8 [100.0%] (fallthru)
adpcm_coderbb_7:
// # PRED: 6 [50.0%] (true,exec)
diff = diff - step;
vpdiff = vpdiff + step;
delta = 4;
// # SUCC: 8 [100.0%] (fallthru,exec)
adpcm_coderbb_8:
// # PRED: 23 [100.0%] (fallthru) 7 [100.0%] (fallthru,exec)
step_35 = step >> 1;
if (diff >= step_35)
goto adpcm_coderbb_9;
else
goto adpcm_coderbb_10;
// # SUCC: 9 [50.0%] (true,exec) 10 [50.0%] (false,exec)
adpcm_coderbb_9:
// # PRED: 8 [50.0%] (true,exec)
delta = delta | 2;
diff = diff - step_35;
vpdiff = vpdiff + step_35;
// # SUCC: 10 [100.0%] (fallthru,exec)
adpcm_coderbb_10:
// # PRED: 8 [50.0%] (false,exec) 9 [100.0%] (fallthru,exec)
step_36 = step_35 >> 1;
if (diff >= step_36)
goto adpcm_coderbb_11;
else
goto adpcm_coderbb_12;
// # SUCC: 11 [50.0%] (true,exec) 12 [50.0%] (false,exec)
adpcm_coderbb_11:
// # PRED: 10 [50.0%] (true,exec)
delta = delta | 1;
vpdiff = vpdiff + step_36;
// # SUCC: 12 [100.0%] (fallthru,exec)
adpcm_coderbb_12:
// # PRED: 10 [50.0%] (false,exec) 11 [100.0%] (fallthru,exec)
if (sign != 0)
goto adpcm_coderbb_13;
else
goto adpcm_coderbb_14;
// # SUCC: 13 [50.0%] (true,exec) 14 [50.0%] (false,exec)
adpcm_coderbb_13:
// # PRED: 12 [50.0%] (true,exec)
valpred_34 = valpred - vpdiff;
goto adpcm_coderbb_15;
// # SUCC: 15 [100.0%] (fallthru,exec)
adpcm_coderbb_14:
// # PRED: 12 [50.0%] (false,exec)
valpred_34 = vpdiff + valpred;
// # SUCC: 15 [100.0%] (fallthru,exec)
adpcm_coderbb_15:
// # PRED: 13 [100.0%] (fallthru,exec) 14 [100.0%] (fallthru,exec)
valpred_41 = (valpred_34>-32768)?valpred_34:-32768;
valpred = (valpred_41<32767)?valpred_41:32767;
delta_37 = delta | sign;
index_38 = indexTable[delta_37] + index;
simDCache(indexTable_addr + (4 * (delta_37)), 1);
index_40 = (index_38>0)?index_38:0;
index = (index_40<88)?index_40:88;
step = stepsizeTable[index];
simDCache(stepsizeTable_addr + (4 * (index)), 1);
if (bufferstep != 0)
goto adpcm_coderbb_16;
else
goto adpcm_coderbb_17;
// # SUCC: 16 [50.0%] (true,exec) 17 [50.0%] (false,exec)
adpcm_coderbb_16:
// # PRED: 15 [50.0%] (true,exec)
outputbuffer = delta_37 << 4 & 255;
simDCache(outputbuffer_addr, 0);
goto adpcm_coderbb_18;
// # SUCC: 18 [100.0%] (fallthru,exec)
adpcm_coderbb_17:
// # PRED: 15 [50.0%] (false,exec)
*outp = (signed char) delta_37 & 15 | (signed char) outputbuffer;
simDCache(outputbuffer_addr, 1);
simDCache(outp_addr, 0);
outp = (uintptr_t)outp + 1;
// # SUCC: 18 [100.0%] (fallthru,exec)
adpcm_coderbb_18:
// # PRED: 16 [100.0%] (fallthru,exec) 17 [100.0%] (fallthru,exec)
// TODO: UnmappedLS: Load GlobalVar pcmdata at line 263
// TODO: UnmappedLS: Load LocalVar outp at line 305
// TODO: UnmappedLS: Store GlobalVar pcmdata at line 306
bufferstep = bufferstep == 0;
len = len + -1;
ivtmp_28 = ivtmp_28 + 2;
if (len != 0)
goto adpcm_coderbb_4;
else
goto adpcm_coderbb_19;
// # SUCC: 4 [91.0%] (true,exec) 19 [9.0%] (false,exec)
adpcm_coderbb_19:
// # PRED: 18 [9.0%] (false,exec)
if (bufferstep == 0)
goto adpcm_coderbb_20;
else
goto adpcm_coderbb_21;
// # SUCC: 20 [67.0%] (true,exec) 21 [33.0%] (false,exec)
adpcm_coderbb_20:
// # PRED: 19 [67.0%] (true,exec)
*outp = (signed char) (signed char) outputbuffer;
simDCache(outputbuffer_addr, 1);
// # SUCC: 21 [100.0%] (fallthru,exec)
adpcm_coderbb_21:
// # PRED: 19 [33.0%] (false,exec) 20 [100.0%] (fallthru,exec) 2 [9.0%] (false,exec)
// TODO: UnmappedLS: Load LocalVar outp at line 314
// TODO: UnmappedLS: Store GlobalVar stepsizeTable at line 315
simDCache((SP + 0xc), 1); // Reading Spilt Register
// TODO: UnmappedLS: Store GlobalVar coder_1_state at line 317
// TODO: UnmappedLS: Store GlobalVar coder_1_state at line 318
state->valprev = (short int) (short int) valpred;
simDCache(state_addr, 0);
state->index = (char) (char) index;
simDCache(state_addr, 0);
return;
// # SUCC: EXIT [100.0%]
}
instrument/examples/adpcm/adpcm_ins.h deleted 100644 → 0
View file @ 64c1f812
/*
** adpcm.h - include file for adpcm coder.
**
** Version 1.0, 7-Jul-92.
*/
struct adpcm_state {
extern unsigned long SP;
short valprev; /* Previous output value */
char index; /* Index into stepsize table */
};
#ifdef __STDC__
#define ARGS(x) x
#else
#define ARGS(x) ()
#endif
void adpcm_coder (short indata[], unsigned long indata_addr, char outdata[], unsigned long outdata_addr, int len, struct adpcm_state *state, unsigned long state_addr)
instrument/examples/adpcm/in_small_ins.h deleted 100644 → 0
View file @ 64c1f812
This diff is collapsed.
instrument/examples/adpcm/my_ctop_IR_ins.c deleted 100644 → 0
View file @ 64c1f812
/***********************************************************
Intermediate representation of
adpcm/app_dir/my_ctop.c
Converted by ir2c v0.1
***********************************************************/
#include <limits.h>
#include <stdint.h>
#include "ir2c.h"
/*
** Timing - Test timing on adpcm coder and decoder.
**
** The program creates 10Kb garbage, and runs the compressor and
** the decompressor on it.
*/
/*sds*/
#include <stdio.h>
#include "adpcm.h"
#include "in_small.h"
//#include "in_large.h"
#include "my_variables.h"
#define DATASIZE 10*1024 /* Data block size */
//ARR_SIZE is the number of short type elements in
//input data array. defined in in_data_small.h
//unsigned int ARR_SIZE = 13305601;
//unsigned int ARR_SIZE = 684433;
unsigned long SP = 0x1234;
short int pcmdata[DATASIZE];
unsigned long pcmdata_addr = 0x14f208;
char adpcmdata[DATASIZE/2];
unsigned long adpcmdata_addr = 0x154208;
int a[123];
struct adpcm_state coder_1_state;
unsigned long coder_1_state_addr = 0x14f204;
int main() {
long unsigned int end_46;
int i_45;
long unsigned int end_44;
long unsigned int end_43;
long unsigned int start_40;
uintptr_t ivtmp_34;
int D_2229;
uintptr_t ivtmp_28;
long unsigned int count;
long unsigned int end;
long unsigned int start;
long unsigned int j;
int i;
unsigned int ARR_SIZE_0;
unsigned long ARR_SIZE_0_addr = 0x0;
mainbb_2:
// # PRED: ENTRY [100.0%] (fallthru,exec)
simICache(0x354, 1); // PC Relative Load
simICache(0x358, 1); // PC Relative Load
ARR_SIZE_0 = ARR_SIZE;
simDCache(ARR_SIZE_addr, 1);
simDCache(ARR_SIZE_0_addr, 0);
j = ARR_SIZE_0 / 10240;
if (j != 0)
goto mainbb_14;
else
goto mainbb_7;
// # SUCC: 14 [91.0%] (true,exec) 7 [9.0%] (false,exec)
mainbb_14:
// # PRED: 2 [91.0%] (true,exec)
simICache(0x35c, 1); // PC Relative Load
simDCache((SP + 0x4), 1); // Spilling Register
simICache(0x360, 1); // PC Relative Load
simICache(0x364, 1); // PC Relative Load
simICache(0x368, 1); // PC Relative Load
end_43 = 0;
count = 0;
// # SUCC: 3 [100.0%] (fallthru)
mainbb_3:
// # PRED: 13 [100.0%] (fallthru) 14 [100.0%] (fallthru)
end_46 = end_43 + 10240;
if (end_43 < end_46)
goto mainbb_4;
else
goto mainbb_6;
// # SUCC: 4 [99.0%] (true,exec) 6 [1.0%] (false,exec)
mainbb_4:
// # PRED: 3 [99.0%] (true,exec)
simDCache((SP + 0x4), 1); // Reading Spilt Register
i_45 = (int) end_43;
ivtmp_34 = (uintptr_t)&in_Data[i_45];
end_44 = end_43;
// # SUCC: 5 [100.0%] (fallthru,exec)
mainbb_5:
// # PRED: 5 [99.0%] (true,exec) 4 [100.0%] (fallthru,exec)
// TODO: UnmappedLS: Load GlobalVar in_Data at line 179
pcmdata[end_44 - end_43] = *(short int*)((uintptr_t)ivtmp_34);
simDCache(pcmdata_addr + (2 * (end_44-end_43)), 0);
i_45 = i_45 + 1;
end_44 = (long unsigned int) i_45;
ivtmp_34 = ivtmp_34 + 2;
if (end_44 < end_46)
goto mainbb_5;
else
goto mainbb_6;
// # SUCC: 5 [99.0%] (true,exec) 6 [1.0%] (false,exec)
mainbb_6:
// # PRED: 5 [1.0%] (false,exec) 3 [1.0%] (false,exec)
adpcm_coder (&pcmdata, &adpcmdata, 10240, &coder_1_state);
count = count + 1;
if (j > count)
goto mainbb_13;
else
goto mainbb_7;
// # SUCC: 13 [91.0%] (true,exec) 7 [9.0%] (false,exec)
mainbb_13:
// # PRED: 6 [91.0%] (true,exec)
end_43 = end_46;
goto mainbb_3;
// # SUCC: 3 [100.0%] (fallthru)
mainbb_7:
// # PRED: 6 [9.0%] (false,exec) 2 [9.0%] (false,exec)
simICache(0x358, 1); // PC Relative Load
if (ARR_SIZE_0 % 10240 != 0)
simDCache(ARR_SIZE_0_addr, 1);
goto mainbb_8;
else
goto mainbb_12;
// # SUCC: 8 [61.0%] (true,exec) 12 [39.0%] (false,exec)
mainbb_8:
// # PRED: 7 [61.0%] (true,exec)
simICache(0x354, 1); // PC Relative Load
start_40 = j * 10240;
end = ARR_SIZE;
simDCache(ARR_SIZE_addr, 1);
if (start_40 < end)
goto mainbb_9;
else
goto mainbb_11;
// # SUCC: 9 [99.0%] (true,exec) 11 [1.0%] (false,exec)
mainbb_9:
// # PRED: 8 [99.0%] (true,exec)
simICache(0x35c, 1); // PC Relative Load
simICache(0x360, 1); // PC Relative Load
i = (int) start_40;
ivtmp_28 = (uintptr_t)&in_Data[i];
D_2229 = (int) end;
start = start_40;
// # SUCC: 10 [100.0%] (fallthru,exec)
mainbb_10:
// # PRED: 10 [99.0%] (true,exec) 9 [100.0%] (fallthru,exec)
// TODO: UnmappedLS: Inaccurately Matched Load at line 219
pcmdata[start - start_40] = *(short int*)((uintptr_t)ivtmp_28);
simDCache(pcmdata_addr + (2 * (start-start_40)), 0);
i = i + 1;
start = (long unsigned int) i;
ivtmp_28 = ivtmp_28 + 2;
if (i != D_2229)
goto mainbb_10;
else
goto mainbb_11;
// # SUCC: 10 [99.0%] (true,exec) 11 [1.0%] (false,exec)
mainbb_11:
// # PRED: 10 [1.0%] (false,exec) 8 [1.0%] (false,exec)
simICache(0x360, 1); // PC Relative Load
simICache(0x364, 1); // PC Relative Load
simICache(0x368, 1); // PC Relative Load
adpcm_coder (&pcmdata, &adpcmdata, (int) (end - start_40), &coder_1_state);
// # SUCC: 12 [100.0%] (fallthru,exec)
mainbb_12:
// # PRED: 7 [39.0%] (false,exec) 11 [100.0%] (fallthru,exec)
return 0;
// # SUCC: EXIT [100.0%]
}
instrument/examples/adpcm/my_variables_ins.h deleted 100644 → 0
View file @ 64c1f812
// unsigned int ARR_SIZE = 13305601;
extern unsigned long SP;
unsigned int ARR_SIZE = 684433;
unsigned long ARR_SIZE_addr = 0xaa0;
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