Commit 843ff963 authored by Gaurav Kukreja's avatar Gaurav Kukreja

Fixed bugs, made ICache Simulation work

Signed-off-by: Gaurav Kukreja's avatarGaurav Kukreja <gaurav@gauravk.in>
parent 6a1add7e
...@@ -10,3 +10,4 @@ examples/crc32/app_dir/in_large.h ...@@ -10,3 +10,4 @@ examples/crc32/app_dir/in_large.h
*.pyc *.pyc
*.gdbo *.gdbo
*.gdbx *.gdbx
*.gch
# Makefile for cache simulator # Makefile for cache simulator
include Makefile.macros include Makefile.macros
SRC = src SRC = $(CACHESIM_SRC)
LIB = $(CACHESIM_LIB) LIB = $(CACHESIM_LIB)
INSTALL = cp INSTALL = cp
...@@ -14,4 +14,4 @@ cacheSim: ...@@ -14,4 +14,4 @@ cacheSim:
clean: clean:
rm -rf *.o rm -rf *.o
rm -rf $(LIB)/cacheSim.so rm -rf $(LIB)/cacheSim.so
\ No newline at end of file
# Configuration for cache simulator # Configuration for cache simulator
# Stupid Makefile Issue: Make sure no white space at the end of the variable declarations
# http://stackoverflow.com/questions/18136918/how-to-get-current-directory-of-your-makefile
mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
current_dir := $(patsubst %/,%,$(dir $(mkfile_path)))
# Path to Cache Simulator # Path to Cache Simulator
CSIM_DIR = /home/gaurav/workspace/hostCompiledSimulation/cache_simulator CSIM_DIR = $(current_dir)
# Hardware Model to use # Hardware Model to use
CACHESIM_HWMOD = generic CACHESIM_HWMOD = generic
CACHESIM_SRC = $(CSIM_DIR)/src
CACHESIM_HEADERS = $(CSIM_DIR)/headers/ CACHESIM_HEADERS = $(CSIM_DIR)/headers/
CACHESIM_LIB = $(CSIM_DIR)/lib/ CACHESIM_LIB = $(CSIM_DIR)/lib/
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
extern unsigned long simICache(unsigned long address, unsigned int nBytes); extern unsigned long long simICache(unsigned long address, unsigned int nBytes);
/** /**
* Simulates Data Cache access by benchmark * Simulates Data Cache access by benchmark
...@@ -27,7 +27,7 @@ extern unsigned long simICache(unsigned long address, unsigned int nBytes); ...@@ -27,7 +27,7 @@ extern unsigned long simICache(unsigned long address, unsigned int nBytes);
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
extern unsigned long simDCache(unsigned long address, unsigned int isReadAccess); extern unsigned long long simDCache(unsigned long address, unsigned int isReadAccess);
/** /**
* Initialize the cache data structures * Initialize the cache data structures
......
...@@ -47,9 +47,9 @@ ...@@ -47,9 +47,9 @@
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
unsigned long simICache(unsigned long address, unsigned int nBytes) unsigned long long simICache(unsigned long address, unsigned int nBytes)
{ {
unsigned int nCycles; unsigned long long nCycles;
cacheSimStat.access_type = ACCESS_TYPE_INVALID; cacheSimStat.access_type = ACCESS_TYPE_INVALID;
cacheSimStat.nCycles = 0; cacheSimStat.nCycles = 0;
cacheSimStat.powerMicroJ = 0; cacheSimStat.powerMicroJ = 0;
...@@ -70,9 +70,9 @@ unsigned long simICache(unsigned long address, unsigned int nBytes) ...@@ -70,9 +70,9 @@ unsigned long simICache(unsigned long address, unsigned int nBytes)
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
unsigned long simDCache(unsigned long address, unsigned int isReadAccess) unsigned long long simDCache(unsigned long address, unsigned int isReadAccess)
{ {
unsigned int nCycles; unsigned long long nCycles;
cacheSimStat.access_type = ACCESS_TYPE_INVALID; cacheSimStat.access_type = ACCESS_TYPE_INVALID;
cacheSimStat.nCycles = 0; cacheSimStat.nCycles = 0;
cacheSimStat.powerMicroJ = 0; cacheSimStat.powerMicroJ = 0;
......
...@@ -23,7 +23,7 @@ struct cacheSimHwMod_t ...@@ -23,7 +23,7 @@ struct cacheSimHwMod_t
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
unsigned long (*simICache) (unsigned long address, unsigned int nBytes); unsigned long long (*simICache) (unsigned long address, unsigned int nBytes);
/** /**
* Simulates Data Cache access by benchmark * Simulates Data Cache access by benchmark
...@@ -33,7 +33,7 @@ struct cacheSimHwMod_t ...@@ -33,7 +33,7 @@ struct cacheSimHwMod_t
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
unsigned long (*simDCache) (unsigned long address, unsigned int isReadAccess); unsigned long long (*simDCache) (unsigned long address, unsigned int isReadAccess);
/** /**
* Initialize the cache data structures * Initialize the cache data structures
......
...@@ -64,11 +64,11 @@ struct cacheParam_t ...@@ -64,11 +64,11 @@ struct cacheParam_t
unsigned int isWriteThrough; unsigned int isWriteThrough;
// Latencies // Latencies
unsigned int latHitRead; unsigned int cyclesHitRead;
unsigned int latHitWriteThrough; unsigned int cyclesHitWriteThrough;
unsigned int latHitWriteBack; unsigned int cyclesHitWriteBack;
unsigned int latMiss; unsigned int cyclesMiss;
unsigned int latMissFlush; unsigned int cyclesMissFlush;
}; };
#define CACHELINE_VALID_BIT (1 << 0) #define CACHELINE_VALID_BIT (1 << 0)
...@@ -96,6 +96,7 @@ struct cacheLine_t ...@@ -96,6 +96,7 @@ struct cacheLine_t
struct cacheParam_t L1Params; struct cacheParam_t L1Params;
struct cacheParam_t L2Params; struct cacheParam_t L2Params;
unsigned long cyclesMemAccess;
struct cacheLine_t **L1DCache; struct cacheLine_t **L1DCache;
struct cacheLine_t **L1ICache; struct cacheLine_t **L1ICache;
...@@ -114,9 +115,6 @@ unsigned int *L2ICacheReplace; ...@@ -114,9 +115,6 @@ unsigned int *L2ICacheReplace;
* LOCAL FUNCTION DECLARATIONS * LOCAL FUNCTION DECLARATIONS
******************************************************************************/ ******************************************************************************/
unsigned int generic_simL1DCache(unsigned long address,
unsigned int isReadAcccess);
void readConfigFile(); void readConfigFile();
void** alloc2D(unsigned int rows, unsigned int cols, size_t size); void** alloc2D(unsigned int rows, unsigned int cols, size_t size);
...@@ -126,6 +124,13 @@ void** alloc2D(unsigned int rows, unsigned int cols, size_t size); ...@@ -126,6 +124,13 @@ void** alloc2D(unsigned int rows, unsigned int cols, size_t size);
* LOCAL FUNCTIONS * LOCAL FUNCTIONS
******************************************************************************/ ******************************************************************************/
int log_base2(int val)
{
int ret = 0;
while (val >>= 1) ++ret;
return ret;
}
/** /**
* Reads config file and initializes data structures * Reads config file and initializes data structures
* *
...@@ -140,18 +145,19 @@ void readConfigFile() ...@@ -140,18 +145,19 @@ void readConfigFile()
// L1 Cache Parameters - same for separate Instruction and Data Cache // L1 Cache Parameters - same for separate Instruction and Data Cache
// L1 Size Params // L1 Size Params
L1Params.cacheSets = 4; L1Params.cacheSets = 4;
L1Params.cacheSizeBytes = 16 * 1024; // 16 KB L1Params.cacheSizeBytes = 256;
L1Params.lineSizeBytes = 16; L1Params.lineSizeBytes = 16;
L1Params.tagLengthBits = 20; L1Params.indexLengthBits = log_base2(L1Params.cacheSizeBytes / (L1Params.cacheSets * L1Params.lineSizeBytes));
L1Params.indexLengthBits = 8; // 256 lines L1Params.offsetLengthBits = log_base2(L1Params.lineSizeBytes);
L1Params.offsetLengthBits = 4; // 16B cache lines L1Params.tagLengthBits = 32 - L1Params.indexLengthBits - L1Params.offsetLengthBits;
// L1 Latencies // L1 Latencies
L1Params.latHitRead = 2; L1Params.cyclesHitRead = 2;
L1Params.latHitWriteThrough = 100; L1Params.cyclesHitWriteThrough = 100;
L1Params.latHitWriteBack = 4; L1Params.cyclesHitWriteBack = 4;
L1Params.latMiss = 2; L1Params.cyclesMiss = 2;
L1Params.latMissFlush = 105; L1Params.cyclesMissFlush = 105;
// L1 Features // L1 Features
L1Params.isWriteThrough = 1; L1Params.isWriteThrough = 1;
...@@ -183,18 +189,18 @@ void readConfigFile() ...@@ -183,18 +189,18 @@ void readConfigFile()
// L2 Cache Parameters - unified cache for data and instruction // L2 Cache Parameters - unified cache for data and instruction
// L2 Size Params // L2 Size Params
L2Params.cacheSets = 8; L2Params.cacheSets = 8;
L2Params.cacheSizeBytes = 256 * 1024; L2Params.cacheSizeBytes = 2 * 1024;
L2Params.lineSizeBytes = 64; L2Params.lineSizeBytes = 64;
L2Params.tagLengthBits = 17; L2Params.indexLengthBits = log_base2(L2Params.cacheSizeBytes / (L2Params.cacheSets * L2Params.lineSizeBytes));
L2Params.indexLengthBits = 9; // 512 lines L2Params.offsetLengthBits = log_base2(L2Params.lineSizeBytes);
L2Params.offsetLengthBits = 6; // 64B cache lines L2Params.tagLengthBits = 32 - L2Params.indexLengthBits - L2Params.offsetLengthBits;
// L2 Latencies // L2 Latencies
L2Params.latHitRead = 20; L2Params.cyclesHitRead = 20;
L2Params.latHitWriteThrough = 100; L2Params.cyclesHitWriteThrough = 100;
L2Params.latHitWriteBack = 25; L2Params.cyclesHitWriteBack = 25;
L2Params.latMiss = 20; L2Params.cyclesMiss = 20;
L2Params.latMissFlush = 120; L2Params.cyclesMissFlush = 120;
// L2 Features // L2 Features
L2Params.isWriteThrough = 1; L2Params.isWriteThrough = 1;
...@@ -265,85 +271,46 @@ inline unsigned long getIndexFromAddress(unsigned long address, ...@@ -265,85 +271,46 @@ inline unsigned long getIndexFromAddress(unsigned long address,
} }
unsigned int generic_simL2ICache(unsigned long address, unsigned int generic_simL2ICache(unsigned long address,
unsigned int isReadAcccess) unsigned int nBytes,
unsigned long long *nCycles)
{ {
unsigned long index; unsigned long index;
unsigned long tag; unsigned long tag;
int set; int set;
int replaceSet = -1; int replaceSet = -1;
int _address;
tag = getTagFromAddress(address, L2Params.tagLengthBits, for (_address = address; _address < address + nBytes; _address += 4)
L2Params.tagMask);
index = getIndexFromAddress(address, L2Params.offsetLengthBits,
L2Params.indexMask);
for(set = 0; set < L2Params.cacheSets; set++)
{ {
if(L2ICache[set][index].tag == tag && tag = getTagFromAddress(_address, L2Params.tagLengthBits,
(IS_CACHELINE_VALID(L2ICache[set][index].flags))) // L2 HIT L2Params.tagMask);
{ index = getIndexFromAddress(_address, L2Params.offsetLengthBits,
if(!isReadAcccess) // Write Access L2Params.indexMask);
{
if(L2Params.isWriteThrough) // Write Through
{
// Data in L2 will be updated, and will remain VALID -
// nothing to do
// Some cycles wasted for data flush for(set = 0; set < L2Params.cacheSets; set++)
cacheSimStat.access_type = L2_HIT_WRITETHROUGH; {
cacheSimStat.nCycles += L2Params.latHitWriteThrough; if(L2ICache[set][index].tag == tag &&
return CACHE_HIT_WRITETHROUGH; (IS_CACHELINE_VALID(L2ICache[set][index].flags))) // L2 HIT
}
else // Write Back
{
// Data in L2 will be updated, and will remain VALID. Line
// will be marked for flush - nothing to do
// No extra cycles wasted now for flush
cacheSimStat.access_type = L2_HIT_WRITEBACK;
cacheSimStat.nCycles += L2Params.latHitWriteBack;
return CACHE_HIT_WRITEBACK;
}
}
else // Read Access
{ {
// Nothing to do, no cycles spent // Nothing to do, no cycles spent
cacheSimStat.access_type = L2_HIT_READ; cacheSimStat.access_type = L2_HIT_READ;
cacheSimStat.nCycles += L2Params.latHitRead; cacheSimStat.nCycles += L2Params.cyclesHitRead;
*nCycles += L2Params.cyclesHitRead;
return CACHE_HIT; return CACHE_HIT;
} }
if (replaceSet == -1 && !(IS_CACHELINE_VALID (L2ICache[set][index].flags)))
replaceSet = set;
} }
if (replaceSet == -1 && !(IS_CACHELINE_VALID (L2ICache[set][index].flags)))
replaceSet = set;
}
// Cache Miss Occurred
if (replaceSet == -1)
{
replaceSet = L2ICacheReplace[index];
L2ICacheReplace[index] = (L2ICacheReplace[index] == 7) ? 0 : L2ICacheReplace[index]+1;
}
if(IS_CACHELINE_DIRTY (L2ICache[replaceSet][index].flags)) // Cache Miss Occurred
{
// !! Should never occur, since we are using Write Through Cache.
// Flush the cache line - nothing to do specifically, just add the
// extra nCycles wasted in this case.
// Already, load new data assuming it will be fetched from L2 or Mem if (replaceSet == -1)
L2ICache[replaceSet][index].tag = tag; {
SET_CACHELINE_VALID (L2ICache[replaceSet][index].flags); replaceSet = L2ICacheReplace[index];
SET_CACHELINE_CLEAN (L2ICache[replaceSet][index].flags); L2ICacheReplace[index] = (L2ICacheReplace[index] == 7) ? 0 : L2ICacheReplace[index]+1;
}
cacheSimStat.access_type = L2_MISS_FLUSH;
cacheSimStat.nCycles += L2Params.latMissFlush;
return CACHE_MISS_FLUSH;
}
else
{
// Evict cache line - nothing to do. No cycles wasted. // Evict cache line - nothing to do. No cycles wasted.
// Already, load new data assuming it will be fetched from L2 or Mem // Already, load new data assuming it will be fetched from L2 or Mem
...@@ -352,92 +319,54 @@ unsigned int generic_simL2ICache(unsigned long address, ...@@ -352,92 +319,54 @@ unsigned int generic_simL2ICache(unsigned long address,
SET_CACHELINE_CLEAN (L2ICache[replaceSet][index].flags); SET_CACHELINE_CLEAN (L2ICache[replaceSet][index].flags);
cacheSimStat.access_type = L2_MISS; cacheSimStat.access_type = L2_MISS;
cacheSimStat.nCycles += L2Params.latMiss; cacheSimStat.nCycles += L2Params.cyclesMiss;
return CACHE_MISS; *nCycles += L2Params.cyclesMiss;
} }
return CACHE_MISS;
} }
unsigned int generic_simL1ICache(unsigned long address, unsigned int generic_simL1ICache(unsigned long address,
unsigned int isReadAcccess) unsigned int nBytes,
unsigned long long *nCycles)
{ {
unsigned long index; unsigned long index;
unsigned long tag; unsigned long tag;
int set; int set;
int replaceSet = -1; int replaceSet = -1;
int _address;
tag = getTagFromAddress(address, L1Params.tagLengthBits, for (_address = address; _address < address + nBytes; _address += 4)
L1Params.tagMask);
index = getIndexFromAddress(address, L1Params.offsetLengthBits,
L1Params.indexMask);
for(set = 0; set < L1Params.cacheSets; set++)
{ {
if(L1ICache[set][index].tag == tag && tag = getTagFromAddress(_address, L1Params.tagLengthBits,
(IS_CACHELINE_VALID(L1ICache[set][index].flags))) // L1 HIT L1Params.tagMask);
{ index = getIndexFromAddress(_address, L1Params.offsetLengthBits,
if(!isReadAcccess) // Write Access L1Params.indexMask);
{
if(L1Params.isWriteThrough) // Write Through
{
// Data in L1 will be updated, and will remain VALID -
// nothing to do
// Some cycles wasted for data flush for(set = 0; set < L1Params.cacheSets; set++)
cacheSimStat.access_type = L1_HIT_WRITETHROUGH; {
cacheSimStat.nCycles += L1Params.latHitWriteThrough; if(L1ICache[set][index].tag == tag &&
return CACHE_HIT_WRITETHROUGH; (IS_CACHELINE_VALID(L1ICache[set][index].flags))) // L1 HIT
}
else // Write Back
{
// Data in L1 will be updated, and will remain VALID. Line
// will be marked for flush - nothing to do
// No extra cycles wasted now for flush
cacheSimStat.access_type = L1_HIT_WRITEBACK;
cacheSimStat.nCycles += L1Params.latHitWriteBack;
return CACHE_HIT_WRITEBACK;
}
}
else // Read Access
{ {
// Nothing to do, no cycles spent // Nothing to do, no cycles spent
cacheSimStat.access_type = L1_HIT_READ; cacheSimStat.access_type = L1_HIT_READ;
cacheSimStat.nCycles += L1Params.latHitRead; cacheSimStat.nCycles += L1Params.cyclesHitRead;
return CACHE_HIT; *nCycles += L1Params.cyclesHitRead;
return CACHE_HIT;
} }
if (replaceSet == -1 && !(IS_CACHELINE_VALID (L1ICache[set][index].flags)))
replaceSet = set;
} }
if (replaceSet == -1 && !(IS_CACHELINE_VALID (L1ICache[set][index].flags)))
replaceSet = set;
}
// Cache Miss Occurred // Cache Miss Occurred
if (replaceSet == -1) if (replaceSet == -1)
{ {
replaceSet = L1ICacheReplace[index]; replaceSet = L1ICacheReplace[index];
L1ICacheReplace[index] = (L1ICacheReplace[index] == 3) ? 0 : L1ICacheReplace[index]+1; L1ICacheReplace[index] = (L1ICacheReplace[index] == 3) ? 0 : L1ICacheReplace[index]+1;
} }
if(IS_CACHELINE_DIRTY (L1ICache[replaceSet][index].flags))
{
// !! Should never occur, since we are using Write Through Cache.
// Flush the cache line - nothing to do specifically, just add the
// extra nCycles wasted in this case.
// Already, load new data assuming it will be fetched from L2 or Mem
L1ICache[replaceSet][index].tag = tag;
SET_CACHELINE_VALID (L1ICache[replaceSet][index].flags);
SET_CACHELINE_CLEAN (L1ICache[replaceSet][index].flags);
cacheSimStat.access_type = L1_MISS_FLUSH;
cacheSimStat.nCycles += L1Params.latMissFlush;
return CACHE_MISS_FLUSH;
}
else
{
// Evict cache line - nothing to do. No cycles wasted. // Evict cache line - nothing to do. No cycles wasted.
// Already, load new data assuming it will be fetched from L2 or Mem // Already, load new data assuming it will be fetched from L2 or Mem
...@@ -446,28 +375,15 @@ unsigned int generic_simL1ICache(unsigned long address, ...@@ -446,28 +375,15 @@ unsigned int generic_simL1ICache(unsigned long address,
SET_CACHELINE_CLEAN (L1ICache[replaceSet][index].flags); SET_CACHELINE_CLEAN (L1ICache[replaceSet][index].flags);
cacheSimStat.access_type = L1_MISS; cacheSimStat.access_type = L1_MISS;
cacheSimStat.nCycles += L1Params.latMiss; cacheSimStat.nCycles += L1Params.cyclesMiss;
return CACHE_MISS; *nCycles += L1Params.cyclesMiss;
} }
} return CACHE_MISS;
/**
* Simulates Instruction Cache access by benchmark
*
* @param address Starting address of instructions in the basic block
* @param nBytes Number of bytes of instructions accessed in the basic block
*
* @return number of clock cycles spent
*/
unsigned long generic_simICache(unsigned long address, unsigned int nBytes)
{
unsigned int nCycles = 100;
return nCycles;
} }
unsigned int generic_simL2DCache(unsigned long address, unsigned int generic_simL2DCache(unsigned long address,
unsigned int isReadAcccess) unsigned int isReadAcccess,
unsigned long long *nCycles)
{ {
unsigned long index; unsigned long index;
unsigned long tag; unsigned long tag;
...@@ -493,7 +409,8 @@ unsigned int generic_simL2DCache(unsigned long address, ...@@ -493,7 +409,8 @@ unsigned int generic_simL2DCache(unsigned long address,
// Some cycles wasted for data flush // Some cycles wasted for data flush
cacheSimStat.access_type = L2_HIT_WRITETHROUGH; cacheSimStat.access_type = L2_HIT_WRITETHROUGH;
cacheSimStat.nCycles += L2Params.latHitWriteThrough; cacheSimStat.nCycles += L2Params.cyclesHitWriteThrough;
*nCycles += L2Params.cyclesHitWriteThrough;
return CACHE_HIT_WRITETHROUGH; return CACHE_HIT_WRITETHROUGH;
} }
else // Write Back else // Write Back
...@@ -503,7 +420,8 @@ unsigned int generic_simL2DCache(unsigned long address, ...@@ -503,7 +420,8 @@ unsigned int generic_simL2DCache(unsigned long address,
// No extra cycles wasted now for flush // No extra cycles wasted now for flush
cacheSimStat.access_type = L2_HIT_WRITEBACK; cacheSimStat.access_type = L2_HIT_WRITEBACK;
cacheSimStat.nCycles += L2Params.latHitWriteBack; cacheSimStat.nCycles += L2Params.cyclesHitWriteBack;
*nCycles += L2Params.cyclesHitWriteBack;
return CACHE_HIT_WRITEBACK; return CACHE_HIT_WRITEBACK;
} }
} }
...@@ -512,7 +430,8 @@ unsigned int generic_simL2DCache(unsigned long address, ...@@ -512,7 +430,8 @@ unsigned int generic_simL2DCache(unsigned long address,
// Nothing to do, no cycles spent // Nothing to do, no cycles spent
cacheSimStat.access_type = L2_HIT_READ; cacheSimStat.access_type = L2_HIT_READ;
cacheSimStat.nCycles += L2Params.latHitRead; cacheSimStat.nCycles += L2Params.cyclesHitRead;
*nCycles += L2Params.cyclesHitRead;
return CACHE_HIT; return CACHE_HIT;
} }
} }
...@@ -541,7 +460,8 @@ unsigned int generic_simL2DCache(unsigned long address, ...@@ -541,7 +460,8 @@ unsigned int generic_simL2DCache(unsigned long address,
SET_CACHELINE_CLEAN (L2DCache[replaceSet][index].flags); SET_CACHELINE_CLEAN (L2DCache[replaceSet][index].flags);
cacheSimStat.access_type = L2_MISS_FLUSH; cacheSimStat.access_type = L2_MISS_FLUSH;
cacheSimStat.nCycles += L2Params.latMissFlush; cacheSimStat.nCycles += L2Params.cyclesMissFlush;
*nCycles += L2Params.cyclesMissFlush;
return CACHE_MISS_FLUSH; return CACHE_MISS_FLUSH;
} }
else else
...@@ -554,14 +474,16 @@ unsigned int generic_simL2DCache(unsigned long address, ...@@ -554,14 +474,16 @@ unsigned int generic_simL2DCache(unsigned long address,
SET_CACHELINE_CLEAN (L2DCache[replaceSet][index].flags); SET_CACHELINE_CLEAN (L2DCache[replaceSet][index].flags);
cacheSimStat.access_type = L2_MISS; cacheSimStat.access_type = L2_MISS;
cacheSimStat.nCycles += L2Params.latMiss; cacheSimStat.nCycles += L2Params.cyclesMiss;
*nCycles += L2Params.cyclesMiss;
return CACHE_MISS; return CACHE_MISS;
} }
} }
unsigned int generic_simL1DCache(unsigned long address, unsigned int generic_simL1DCache(unsigned long address,
unsigned int isReadAcccess) unsigned int isReadAcccess,
unsigned long long *nCycles)
{ {
unsigned long index; unsigned long index;
unsigned long tag; unsigned long tag;
...@@ -587,7 +509,8 @@ unsigned int generic_simL1DCache(unsigned long address, ...@@ -587,7 +509,8 @@ unsigned int generic_simL1DCache(unsigned long address,
// Some cycles wasted for data flush // Some cycles wasted for data flush
cacheSimStat.access_type = L1_HIT_WRITETHROUGH; cacheSimStat.access_type = L1_HIT_WRITETHROUGH;
cacheSimStat.nCycles += L1Params.latHitWriteThrough; cacheSimStat.nCycles += L1Params.cyclesHitWriteThrough;
*nCycles += L1Params.cyclesHitWriteThrough;
return CACHE_HIT_WRITETHROUGH; return CACHE_HIT_WRITETHROUGH;
} }
else // Write Back else // Write Back
...@@ -597,7 +520,8 @@ unsigned int generic_simL1DCache(unsigned long address, ...@@ -597,7 +520,8 @@ unsigned int generic_simL1DCache(unsigned long address,
// No extra cycles wasted now for flush // No extra cycles wasted now for flush
cacheSimStat.access_type = L1_HIT_WRITEBACK; cacheSimStat.access_type = L1_HIT_WRITEBACK;
cacheSimStat.nCycles += L1Params.latHitWriteBack; cacheSimStat.nCycles += L1Params.cyclesHitWriteBack;
*nCycles += L1Params.cyclesHitWriteBack;
return CACHE_HIT_WRITEBACK; return CACHE_HIT_WRITEBACK;
} }
} }
...@@ -606,7 +530,8 @@ unsigned int generic_simL1DCache(unsigned long address, ...@@ -606,7 +530,8 @@ unsigned int generic_simL1DCache(unsigned long address,
// Nothing to do, no cycles spent // Nothing to do, no cycles spent
cacheSimStat.access_type = L1_HIT_READ; cacheSimStat.access_type = L1_HIT_READ;
cacheSimStat.nCycles += L1Params.latHitRead; cacheSimStat.nCycles += L1Params.cyclesHitRead;
*nCycles += L1Params.cyclesHitRead;
return CACHE_HIT; return CACHE_HIT;
} }
} }
...@@ -635,7 +560,8 @@ unsigned int generic_simL1DCache(unsigned long address, ...@@ -635,7 +560,8 @@ unsigned int generic_simL1DCache(unsigned long address,
SET_CACHELINE_CLEAN (L1DCache[replaceSet][index].flags); SET_CACHELINE_CLEAN (L1DCache[replaceSet][index].flags);
cacheSimStat.access_type = L1_MISS_FLUSH; cacheSimStat.access_type = L1_MISS_FLUSH;
cacheSimStat.nCycles += L1Params.latMissFlush; cacheSimStat.nCycles += L1Params.cyclesMissFlush;
*nCycles += L1Params.cyclesMissFlush;
return CACHE_MISS_FLUSH; return CACHE_MISS_FLUSH;
} }
else else
...@@ -648,11 +574,40 @@ unsigned int generic_simL1DCache(unsigned long address, ...@@ -648,11 +574,40 @@ unsigned int generic_simL1DCache(unsigned long address,
SET_CACHELINE_CLEAN (L1DCache[replaceSet][index].flags); SET_CACHELINE_CLEAN (L1DCache[replaceSet][index].flags);
cacheSimStat.access_type = L1_MISS; cacheSimStat.access_type = L1_MISS;
cacheSimStat.nCycles += L1Params.latMiss; cacheSimStat.nCycles += L1Params.cyclesMiss;
*nCycles += L1Params.cyclesMiss;
return CACHE_MISS; return CACHE_MISS;
} }
} }
/**
* Simulates Instruction Cache access by benchmark
*
* @param address Starting address of instructions in the basic block
* @param nBytes Number of bytes of instructions accessed in the basic block
*
* @return number of clock cycles spent
*/
unsigned long long generic_simICache(unsigned long address, unsigned int nBytes)
{
unsigned long long nCycles = 0;
unsigned int ret;
ret = generic_simL1ICache(address, nBytes, &nCycles);
if(CACHE_MISS == ret || CACHE_MISS_FLUSH == ret)
{
// L1 Data Cache Miss has occured, simulate L2 Access.
ret = generic_simL2ICache(address, nBytes, &nCycles);
if(CACHE_MISS == ret || CACHE_MISS_FLUSH == ret)
{
nCycles += cyclesMemAccess;
}
}
return nCycles;
}
/** /**
* Simulates Data Cache access by benchmark * Simulates Data Cache access by benchmark
* *
...@@ -660,22 +615,21 @@ unsigned int generic_simL1DCache(unsigned long address, ...@@ -660,22 +615,21 @@ unsigned int generic_simL1DCache(unsigned long address,
* *
* @return number of clock cycles spent * @return number of clock cycles spent
*/ */
unsigned long generic_simDCache(unsigned long address, unsigned int isReadAccess) unsigned long long generic_simDCache(unsigned long address, unsigned int isReadAccess)
{ {
unsigned int nCycles = 100; unsigned long long nCycles = 0;
unsigned int ret; unsigned int ret;
ret = generic_simL1DCache(address, isReadAccess); ret = generic_simL1DCache(address, isReadAccess, &nCycles);
if(CACHE_MISS == ret || CACHE_MISS_FLUSH == ret) if(CACHE_MISS == ret || CACHE_MISS_FLUSH == ret)
{ {
// L1 Data Cache Miss has occured, simulate L2 Access. // L1 Data Cache Miss has occured, simulate L2 Access.
ret = generic_simL2DCache(address, isReadAccess); ret = generic_simL2DCache(address, isReadAccess, &nCycles);
if(CACHE_MISS == ret || CACHE_MISS_FLUSH == ret) if(CACHE_MISS == ret || CACHE_MISS_FLUSH == ret)
{ {
cacheSimStat.nCycles += 100; nCycles += cyclesMemAccess;
} }
} }
return nCycles; return nCycles;
......
# 1 "erat_sieve_no_print_IR.c"
# 1 "<built-in>"
# 1 "<command-line>"
# 1 "erat_sieve_no_print_IR.c"
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/limits.h" 1 3 4
# 34 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/limits.h" 3 4
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/syslimits.h" 1 3 4
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/limits.h" 1 3 4
# 169 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/limits.h" 3 4
# 1 "/usr/include/limits.h" 1 3 4
# 27 "/usr/include/limits.h" 3 4
# 1 "/usr/include/features.h" 1 3 4
# 324 "/usr/include/features.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/predefs.h" 1 3 4
# 325 "/usr/include/features.h" 2 3 4
# 357 "/usr/include/features.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/sys/cdefs.h" 1 3 4
# 378 "/usr/include/x86_64-linux-gnu/sys/cdefs.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/wordsize.h" 1 3 4
# 379 "/usr/include/x86_64-linux-gnu/sys/cdefs.h" 2 3 4
# 358 "/usr/include/features.h" 2 3 4
# 389 "/usr/include/features.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/gnu/stubs.h" 1 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/wordsize.h" 1 3 4
# 5 "/usr/include/x86_64-linux-gnu/gnu/stubs.h" 2 3 4
# 1 "/usr/include/x86_64-linux-gnu/gnu/stubs-64.h" 1 3 4
# 10 "/usr/include/x86_64-linux-gnu/gnu/stubs.h" 2 3 4
# 390 "/usr/include/features.h" 2 3 4
# 28 "/usr/include/limits.h" 2 3 4
# 145 "/usr/include/limits.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/posix1_lim.h" 1 3 4
# 157 "/usr/include/x86_64-linux-gnu/bits/posix1_lim.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/local_lim.h" 1 3 4
# 39 "/usr/include/x86_64-linux-gnu/bits/local_lim.h" 3 4
# 1 "/usr/include/linux/limits.h" 1 3 4
# 40 "/usr/include/x86_64-linux-gnu/bits/local_lim.h" 2 3 4
# 158 "/usr/include/x86_64-linux-gnu/bits/posix1_lim.h" 2 3 4
# 146 "/usr/include/limits.h" 2 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/posix2_lim.h" 1 3 4
# 150 "/usr/include/limits.h" 2 3 4
# 170 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/limits.h" 2 3 4
# 8 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/syslimits.h" 2 3 4
# 35 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include-fixed/limits.h" 2 3 4
# 9 "erat_sieve_no_print_IR.c" 2
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stdint.h" 1 3 4
# 1 "/usr/include/stdint.h" 1 3 4
# 27 "/usr/include/stdint.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/wchar.h" 1 3 4
# 28 "/usr/include/stdint.h" 2 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/wordsize.h" 1 3 4
# 29 "/usr/include/stdint.h" 2 3 4
# 37 "/usr/include/stdint.h" 3 4
typedef signed char int8_t;
typedef short int int16_t;
typedef int int32_t;
typedef long int int64_t;
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long int uint64_t;
# 66 "/usr/include/stdint.h" 3 4
typedef signed char int_least8_t;
typedef short int int_least16_t;
typedef int int_least32_t;
typedef long int int_least64_t;
typedef unsigned char uint_least8_t;
typedef unsigned short int uint_least16_t;
typedef unsigned int uint_least32_t;
typedef unsigned long int uint_least64_t;
# 91 "/usr/include/stdint.h" 3 4
typedef signed char int_fast8_t;
typedef long int int_fast16_t;
typedef long int int_fast32_t;
typedef long int int_fast64_t;
# 104 "/usr/include/stdint.h" 3 4
typedef unsigned char uint_fast8_t;
typedef unsigned long int uint_fast16_t;
typedef unsigned long int uint_fast32_t;
typedef unsigned long int uint_fast64_t;
# 120 "/usr/include/stdint.h" 3 4
typedef long int intptr_t;
typedef unsigned long int uintptr_t;
# 135 "/usr/include/stdint.h" 3 4
typedef long int intmax_t;
typedef unsigned long int uintmax_t;
# 4 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stdint.h" 2 3 4
# 10 "erat_sieve_no_print_IR.c" 2
# 1 "ir2c.h" 1
# 11 "erat_sieve_no_print_IR.c" 2
# 1 "/usr/include/stdio.h" 1 3 4
# 30 "/usr/include/stdio.h" 3 4
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stddef.h" 1 3 4
# 212 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stddef.h" 3 4
typedef long unsigned int size_t;
# 35 "/usr/include/stdio.h" 2 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/types.h" 1 3 4
# 28 "/usr/include/x86_64-linux-gnu/bits/types.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/wordsize.h" 1 3 4
# 29 "/usr/include/x86_64-linux-gnu/bits/types.h" 2 3 4
typedef unsigned char __u_char;
typedef unsigned short int __u_short;
typedef unsigned int __u_int;
typedef unsigned long int __u_long;
typedef signed char __int8_t;
typedef unsigned char __uint8_t;
typedef signed short int __int16_t;
typedef unsigned short int __uint16_t;
typedef signed int __int32_t;
typedef unsigned int __uint32_t;
typedef signed long int __int64_t;
typedef unsigned long int __uint64_t;
typedef long int __quad_t;
typedef unsigned long int __u_quad_t;
# 131 "/usr/include/x86_64-linux-gnu/bits/types.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/typesizes.h" 1 3 4
# 132 "/usr/include/x86_64-linux-gnu/bits/types.h" 2 3 4
typedef unsigned long int __dev_t;
typedef unsigned int __uid_t;
typedef unsigned int __gid_t;
typedef unsigned long int __ino_t;
typedef unsigned long int __ino64_t;
typedef unsigned int __mode_t;
typedef unsigned long int __nlink_t;
typedef long int __off_t;
typedef long int __off64_t;
typedef int __pid_t;
typedef struct { int __val[2]; } __fsid_t;
typedef long int __clock_t;
typedef unsigned long int __rlim_t;
typedef unsigned long int __rlim64_t;
typedef unsigned int __id_t;
typedef long int __time_t;
typedef unsigned int __useconds_t;
typedef long int __suseconds_t;
typedef int __daddr_t;
typedef long int __swblk_t;
typedef int __key_t;
typedef int __clockid_t;
typedef void * __timer_t;
typedef long int __blksize_t;
typedef long int __blkcnt_t;
typedef long int __blkcnt64_t;
typedef unsigned long int __fsblkcnt_t;
typedef unsigned long int __fsblkcnt64_t;
typedef unsigned long int __fsfilcnt_t;
typedef unsigned long int __fsfilcnt64_t;
typedef long int __ssize_t;
typedef __off64_t __loff_t;
typedef __quad_t *__qaddr_t;
typedef char *__caddr_t;
typedef long int __intptr_t;
typedef unsigned int __socklen_t;
# 37 "/usr/include/stdio.h" 2 3 4
# 45 "/usr/include/stdio.h" 3 4
struct _IO_FILE;
typedef struct _IO_FILE FILE;
# 65 "/usr/include/stdio.h" 3 4
typedef struct _IO_FILE __FILE;
# 75 "/usr/include/stdio.h" 3 4
# 1 "/usr/include/libio.h" 1 3 4
# 32 "/usr/include/libio.h" 3 4
# 1 "/usr/include/_G_config.h" 1 3 4
# 15 "/usr/include/_G_config.h" 3 4
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stddef.h" 1 3 4
# 16 "/usr/include/_G_config.h" 2 3 4
# 1 "/usr/include/wchar.h" 1 3 4
# 83 "/usr/include/wchar.h" 3 4
typedef struct
{
int __count;
union
{
unsigned int __wch;
char __wchb[4];
} __value;
} __mbstate_t;
# 21 "/usr/include/_G_config.h" 2 3 4
typedef struct
{
__off_t __pos;
__mbstate_t __state;
} _G_fpos_t;
typedef struct
{
__off64_t __pos;
__mbstate_t __state;
} _G_fpos64_t;
# 53 "/usr/include/_G_config.h" 3 4
typedef int _G_int16_t __attribute__ ((__mode__ (__HI__)));
typedef int _G_int32_t __attribute__ ((__mode__ (__SI__)));
typedef unsigned int _G_uint16_t __attribute__ ((__mode__ (__HI__)));
typedef unsigned int _G_uint32_t __attribute__ ((__mode__ (__SI__)));
# 33 "/usr/include/libio.h" 2 3 4
# 53 "/usr/include/libio.h" 3 4
# 1 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stdarg.h" 1 3 4
# 40 "/usr/lib/gcc/x86_64-linux-gnu/4.6/include/stdarg.h" 3 4
typedef __builtin_va_list __gnuc_va_list;
# 54 "/usr/include/libio.h" 2 3 4
# 172 "/usr/include/libio.h" 3 4
struct _IO_jump_t; struct _IO_FILE;
# 182 "/usr/include/libio.h" 3 4
typedef void _IO_lock_t;
struct _IO_marker {
struct _IO_marker *_next;
struct _IO_FILE *_sbuf;
int _pos;
# 205 "/usr/include/libio.h" 3 4
};
enum __codecvt_result
{
__codecvt_ok,
__codecvt_partial,
__codecvt_error,
__codecvt_noconv
};
# 273 "/usr/include/libio.h" 3 4
struct _IO_FILE {
int _flags;
char* _IO_read_ptr;
char* _IO_read_end;
char* _IO_read_base;
char* _IO_write_base;
char* _IO_write_ptr;
char* _IO_write_end;
char* _IO_buf_base;
char* _IO_buf_end;
char *_IO_save_base;
char *_IO_backup_base;
char *_IO_save_end;
struct _IO_marker *_markers;
struct _IO_FILE *_chain;
int _fileno;
int _flags2;
__off_t _old_offset;
unsigned short _cur_column;
signed char _vtable_offset;
char _shortbuf[1];
_IO_lock_t *_lock;
# 321 "/usr/include/libio.h" 3 4
__off64_t _offset;
# 330 "/usr/include/libio.h" 3 4
void *__pad1;
void *__pad2;
void *__pad3;
void *__pad4;
size_t __pad5;
int _mode;
char _unused2[15 * sizeof (int) - 4 * sizeof (void *) - sizeof (size_t)];
};
typedef struct _IO_FILE _IO_FILE;
struct _IO_FILE_plus;
extern struct _IO_FILE_plus _IO_2_1_stdin_;
extern struct _IO_FILE_plus _IO_2_1_stdout_;
extern struct _IO_FILE_plus _IO_2_1_stderr_;
# 366 "/usr/include/libio.h" 3 4
typedef __ssize_t __io_read_fn (void *__cookie, char *__buf, size_t __nbytes);
typedef __ssize_t __io_write_fn (void *__cookie, __const char *__buf,
size_t __n);
typedef int __io_seek_fn (void *__cookie, __off64_t *__pos, int __w);
typedef int __io_close_fn (void *__cookie);
# 418 "/usr/include/libio.h" 3 4
extern int __underflow (_IO_FILE *);
extern int __uflow (_IO_FILE *);
extern int __overflow (_IO_FILE *, int);
# 462 "/usr/include/libio.h" 3 4
extern int _IO_getc (_IO_FILE *__fp);
extern int _IO_putc (int __c, _IO_FILE *__fp);
extern int _IO_feof (_IO_FILE *__fp) __attribute__ ((__nothrow__ , __leaf__));
extern int _IO_ferror (_IO_FILE *__fp) __attribute__ ((__nothrow__ , __leaf__));
extern int _IO_peekc_locked (_IO_FILE *__fp);
extern void _IO_flockfile (_IO_FILE *) __attribute__ ((__nothrow__ , __leaf__));
extern void _IO_funlockfile (_IO_FILE *) __attribute__ ((__nothrow__ , __leaf__));
extern int _IO_ftrylockfile (_IO_FILE *) __attribute__ ((__nothrow__ , __leaf__));
# 492 "/usr/include/libio.h" 3 4
extern int _IO_vfscanf (_IO_FILE * __restrict, const char * __restrict,
__gnuc_va_list, int *__restrict);
extern int _IO_vfprintf (_IO_FILE *__restrict, const char *__restrict,
__gnuc_va_list);
extern __ssize_t _IO_padn (_IO_FILE *, int, __ssize_t);
extern size_t _IO_sgetn (_IO_FILE *, void *, size_t);
extern __off64_t _IO_seekoff (_IO_FILE *, __off64_t, int, int);
extern __off64_t _IO_seekpos (_IO_FILE *, __off64_t, int);
extern void _IO_free_backup_area (_IO_FILE *) __attribute__ ((__nothrow__ , __leaf__));
# 76 "/usr/include/stdio.h" 2 3 4
typedef __gnuc_va_list va_list;
# 91 "/usr/include/stdio.h" 3 4
typedef __off_t off_t;
# 103 "/usr/include/stdio.h" 3 4
typedef __ssize_t ssize_t;
typedef _G_fpos_t fpos_t;
# 165 "/usr/include/stdio.h" 3 4
# 1 "/usr/include/x86_64-linux-gnu/bits/stdio_lim.h" 1 3 4
# 166 "/usr/include/stdio.h" 2 3 4
extern struct _IO_FILE *stdin;
extern struct _IO_FILE *stdout;
extern struct _IO_FILE *stderr;
extern int remove (__const char *__filename) __attribute__ ((__nothrow__ , __leaf__));
extern int rename (__const char *__old, __const char *__new) __attribute__ ((__nothrow__ , __leaf__));
extern int renameat (int __oldfd, __const char *__old, int __newfd,
__const char *__new) __attribute__ ((__nothrow__ , __leaf__));
extern FILE *tmpfile (void) ;
# 210 "/usr/include/stdio.h" 3 4
extern char *tmpnam (char *__s) __attribute__ ((__nothrow__ , __leaf__)) ;
extern char *tmpnam_r (char *__s) __attribute__ ((__nothrow__ , __leaf__)) ;
# 228 "/usr/include/stdio.h" 3 4
extern char *tempnam (__const char *__dir, __const char *__pfx)
__attribute__ ((__nothrow__ , __leaf__)) __attribute__ ((__malloc__)) ;
extern int fclose (FILE *__stream);
extern int fflush (FILE *__stream);
# 253 "/usr/include/stdio.h" 3 4
extern int fflush_unlocked (FILE *__stream);
# 267 "/usr/include/stdio.h" 3 4
extern FILE *fopen (__const char *__restrict __filename,
__const char *__restrict __modes) ;
extern FILE *freopen (__const char *__restrict __filename,
__const char *__restrict __modes,
FILE *__restrict __stream) ;
# 296 "/usr/include/stdio.h" 3 4
# 307 "/usr/include/stdio.h" 3 4
extern FILE *fdopen (int __fd, __const char *__modes) __attribute__ ((__nothrow__ , __leaf__)) ;
# 320 "/usr/include/stdio.h" 3 4
extern FILE *fmemopen (void *__s, size_t __len, __const char *__modes)
__attribute__ ((__nothrow__ , __leaf__)) ;
extern FILE *open_memstream (char **__bufloc, size_t *__sizeloc) __attribute__ ((__nothrow__ , __leaf__)) ;
extern void setbuf (FILE *__restrict __stream, char *__restrict __buf) __attribute__ ((__nothrow__ , __leaf__));
extern int setvbuf (FILE *__restrict __stream, char *__restrict __buf,
int __modes, size_t __n) __attribute__ ((__nothrow__ , __leaf__));
extern void setbuffer (FILE *__restrict __stream, char *__restrict __buf,
size_t __size) __attribute__ ((__nothrow__ , __leaf__));
extern void setlinebuf (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__));
extern int fprintf (FILE *__restrict __stream,
__const char *__restrict __format, ...);
extern int printf (__const char *__restrict __format, ...);
extern int sprintf (char *__restrict __s,
__const char *__restrict __format, ...) __attribute__ ((__nothrow__));
extern int vfprintf (FILE *__restrict __s, __const char *__restrict __format,
__gnuc_va_list __arg);
extern int vprintf (__const char *__restrict __format, __gnuc_va_list __arg);
extern int vsprintf (char *__restrict __s, __const char *__restrict __format,
__gnuc_va_list __arg) __attribute__ ((__nothrow__));
extern int snprintf (char *__restrict __s, size_t __maxlen,
__const char *__restrict __format, ...)
__attribute__ ((__nothrow__)) __attribute__ ((__format__ (__printf__, 3, 4)));
extern int vsnprintf (char *__restrict __s, size_t __maxlen,
__const char *__restrict __format, __gnuc_va_list __arg)
__attribute__ ((__nothrow__)) __attribute__ ((__format__ (__printf__, 3, 0)));
# 418 "/usr/include/stdio.h" 3 4
extern int vdprintf (int __fd, __const char *__restrict __fmt,
__gnuc_va_list __arg)
__attribute__ ((__format__ (__printf__, 2, 0)));
extern int dprintf (int __fd, __const char *__restrict __fmt, ...)
__attribute__ ((__format__ (__printf__, 2, 3)));
extern int fscanf (FILE *__restrict __stream,
__const char *__restrict __format, ...) ;
extern int scanf (__const char *__restrict __format, ...) ;
extern int sscanf (__const char *__restrict __s,
__const char *__restrict __format, ...) __attribute__ ((__nothrow__ , __leaf__));
# 449 "/usr/include/stdio.h" 3 4
extern int fscanf (FILE *__restrict __stream, __const char *__restrict __format, ...) __asm__ ("" "__isoc99_fscanf")
;
extern int scanf (__const char *__restrict __format, ...) __asm__ ("" "__isoc99_scanf")
;
extern int sscanf (__const char *__restrict __s, __const char *__restrict __format, ...) __asm__ ("" "__isoc99_sscanf") __attribute__ ((__nothrow__ , __leaf__))
;
# 469 "/usr/include/stdio.h" 3 4
extern int vfscanf (FILE *__restrict __s, __const char *__restrict __format,
__gnuc_va_list __arg)
__attribute__ ((__format__ (__scanf__, 2, 0))) ;
extern int vscanf (__const char *__restrict __format, __gnuc_va_list __arg)
__attribute__ ((__format__ (__scanf__, 1, 0))) ;
extern int vsscanf (__const char *__restrict __s,
__const char *__restrict __format, __gnuc_va_list __arg)
__attribute__ ((__nothrow__ , __leaf__)) __attribute__ ((__format__ (__scanf__, 2, 0)));
# 500 "/usr/include/stdio.h" 3 4
extern int vfscanf (FILE *__restrict __s, __const char *__restrict __format, __gnuc_va_list __arg) __asm__ ("" "__isoc99_vfscanf")
__attribute__ ((__format__ (__scanf__, 2, 0))) ;
extern int vscanf (__const char *__restrict __format, __gnuc_va_list __arg) __asm__ ("" "__isoc99_vscanf")
__attribute__ ((__format__ (__scanf__, 1, 0))) ;
extern int vsscanf (__const char *__restrict __s, __const char *__restrict __format, __gnuc_va_list __arg) __asm__ ("" "__isoc99_vsscanf") __attribute__ ((__nothrow__ , __leaf__))
__attribute__ ((__format__ (__scanf__, 2, 0)));
# 528 "/usr/include/stdio.h" 3 4
extern int fgetc (FILE *__stream);
extern int getc (FILE *__stream);
extern int getchar (void);
# 556 "/usr/include/stdio.h" 3 4
extern int getc_unlocked (FILE *__stream);
extern int getchar_unlocked (void);
# 567 "/usr/include/stdio.h" 3 4
extern int fgetc_unlocked (FILE *__stream);
extern int fputc (int __c, FILE *__stream);
extern int putc (int __c, FILE *__stream);
extern int putchar (int __c);
# 600 "/usr/include/stdio.h" 3 4
extern int fputc_unlocked (int __c, FILE *__stream);
extern int putc_unlocked (int __c, FILE *__stream);
extern int putchar_unlocked (int __c);
extern int getw (FILE *__stream);
extern int putw (int __w, FILE *__stream);
extern char *fgets (char *__restrict __s, int __n, FILE *__restrict __stream)
;
extern char *gets (char *__s) ;
# 662 "/usr/include/stdio.h" 3 4
extern __ssize_t __getdelim (char **__restrict __lineptr,
size_t *__restrict __n, int __delimiter,
FILE *__restrict __stream) ;
extern __ssize_t getdelim (char **__restrict __lineptr,
size_t *__restrict __n, int __delimiter,
FILE *__restrict __stream) ;
extern __ssize_t getline (char **__restrict __lineptr,
size_t *__restrict __n,
FILE *__restrict __stream) ;
extern int fputs (__const char *__restrict __s, FILE *__restrict __stream);
extern int puts (__const char *__s);
extern int ungetc (int __c, FILE *__stream);
extern size_t fread (void *__restrict __ptr, size_t __size,
size_t __n, FILE *__restrict __stream) ;
extern size_t fwrite (__const void *__restrict __ptr, size_t __size,
size_t __n, FILE *__restrict __s);
# 734 "/usr/include/stdio.h" 3 4
extern size_t fread_unlocked (void *__restrict __ptr, size_t __size,
size_t __n, FILE *__restrict __stream) ;
extern size_t fwrite_unlocked (__const void *__restrict __ptr, size_t __size,
size_t __n, FILE *__restrict __stream);
extern int fseek (FILE *__stream, long int __off, int __whence);
extern long int ftell (FILE *__stream) ;
extern void rewind (FILE *__stream);
# 770 "/usr/include/stdio.h" 3 4
extern int fseeko (FILE *__stream, __off_t __off, int __whence);
extern __off_t ftello (FILE *__stream) ;
# 789 "/usr/include/stdio.h" 3 4
extern int fgetpos (FILE *__restrict __stream, fpos_t *__restrict __pos);
extern int fsetpos (FILE *__stream, __const fpos_t *__pos);
# 812 "/usr/include/stdio.h" 3 4
# 821 "/usr/include/stdio.h" 3 4
extern void clearerr (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__));
extern int feof (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
extern int ferror (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
extern void clearerr_unlocked (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__));
extern int feof_unlocked (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
extern int ferror_unlocked (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
extern void perror (__const char *__s);
# 1 "/usr/include/x86_64-linux-gnu/bits/sys_errlist.h" 1 3 4
# 27 "/usr/include/x86_64-linux-gnu/bits/sys_errlist.h" 3 4
extern int sys_nerr;
extern __const char *__const sys_errlist[];
# 851 "/usr/include/stdio.h" 2 3 4
extern int fileno (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
extern int fileno_unlocked (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
# 870 "/usr/include/stdio.h" 3 4
extern FILE *popen (__const char *__command, __const char *__modes) ;
extern int pclose (FILE *__stream);
extern char *ctermid (char *__s) __attribute__ ((__nothrow__ , __leaf__));
# 910 "/usr/include/stdio.h" 3 4
extern void flockfile (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__));
extern int ftrylockfile (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__)) ;
extern void funlockfile (FILE *__stream) __attribute__ ((__nothrow__ , __leaf__));
# 940 "/usr/include/stdio.h" 3 4
# 13 "erat_sieve_no_print_IR.c" 2
unsigned int results[500000];
struct test {
unsigned int v;
unsigned int k;
} m = { 1, 1 };
void sieve_func() {
int j_76;
uintptr_t ivtmp_74;
int i_72;
uintptr_t ivtmp_68;
uintptr_t D_2263;
uintptr_t ivtmp_58;
uintptr_t D_2252;
uintptr_t ivtmp_49;
uintptr_t D_2240;
uintptr_t D_2230;
uintptr_t ivtmp_36;
int j;
int i;
unsigned int sieve[500000];
sieve_funcbb_2:
ivtmp_68 = 0;
sieve_funcbb_3:
*(unsigned int*)((uintptr_t)&results + (uintptr_t)ivtmp_68) = 1;
*(unsigned int*)((uintptr_t)&sieve + (uintptr_t)ivtmp_68) = 1;
ivtmp_68 = ivtmp_68 + 4;
if (ivtmp_68 != 2000000)
goto sieve_funcbb_3;
else
goto sieve_funcbb_17;
sieve_funcbb_17:
ivtmp_49 = 6;
ivtmp_58 = 4;
i_72 = 2;
sieve_funcbb_4:
D_2263 = (unsigned int) i_72;
if (*(unsigned int*)((uintptr_t)&sieve + (uintptr_t)D_2263 * 4) != 0)
goto sieve_funcbb_5;
else
goto sieve_funcbb_7;
sieve_funcbb_5:
j_76 = (int) ivtmp_58;
if (j_76 <= 499999)
goto sieve_funcbb_18;
else
goto sieve_funcbb_7;
sieve_funcbb_18:
ivtmp_74 = ivtmp_49;
sieve_funcbb_6:
sieve[j_76] = 0;
D_2252 = (unsigned int) j_76 + D_2263;
j_76 = (int) D_2252;
ivtmp_74 = D_2263 + ivtmp_74;
if ((int) (ivtmp_74 - D_2263) <= 499999)
goto sieve_funcbb_6;
else
goto sieve_funcbb_7;
sieve_funcbb_7:
i_72 = i_72 + 1;
ivtmp_58 = ivtmp_58 + 2;
ivtmp_49 = ivtmp_49 + 3;
if (i_72 * i_72 <= 499999)
goto sieve_funcbb_4;
else
goto sieve_funcbb_8;
sieve_funcbb_8:
j = 2;
i = 0;
sieve_funcbb_9:
D_2240 = (unsigned int) j;
if (*(unsigned int*)((uintptr_t)&sieve + (uintptr_t)D_2240 * 4) != 0)
goto sieve_funcbb_10;
else
goto sieve_funcbb_11;
sieve_funcbb_10:
results[i] = D_2240;
i = i + 1;
sieve_funcbb_11:
j = j + 1;
if (j != 500000)
goto sieve_funcbb_9;
else
goto sieve_funcbb_12;
sieve_funcbb_12:
if (results[0] == 0)
goto sieve_funcbb_16;
else
goto sieve_funcbb_13;
sieve_funcbb_13:
ivtmp_36 = (uintptr_t)&results;
D_2230 = ivtmp_36 + 1999996;
sieve_funcbb_14:
if (*(unsigned int*)((uintptr_t)ivtmp_36 + 4) == 0)
goto sieve_funcbb_16;
else
goto sieve_funcbb_15;
sieve_funcbb_15:
ivtmp_36 = ivtmp_36 + 4;
if (ivtmp_36 != D_2230)
goto sieve_funcbb_14;
else
goto sieve_funcbb_16;
sieve_funcbb_16:
m.v = 0;
return;
}
int main(void) {
mainbb_2:
sieve_func ();
return 0;
}
...@@ -97,7 +97,7 @@ def annotateVarFuncDecl(listISCFileNames, listISCFunctions, listGlobalVariables, ...@@ -97,7 +97,7 @@ def annotateVarFuncDecl(listISCFileNames, listISCFunctions, listGlobalVariables,
addAnnotationToDict(dictAnnotVarFuncDecl, addAnnotationToDict(dictAnnotVarFuncDecl,
lineNum, lineNum,
annot) annot)
annot_str = "extern unsigned long memAccessCycles;" annot_str = "extern unsigned long long memAccessCycles;"
annot = Annotation(annot_str, ISCFileName, lineNum, False) annot = Annotation(annot_str, ISCFileName, lineNum, False)
addAnnotationToDict(dictAnnotVarFuncDecl, addAnnotationToDict(dictAnnotVarFuncDecl,
lineNum, lineNum,
...@@ -442,7 +442,7 @@ def annotateLoadStore(listISCFunctions, listObjdumpFunctions, listLSInfo, listGl ...@@ -442,7 +442,7 @@ def annotateLoadStore(listISCFunctions, listObjdumpFunctions, listLSInfo, listGl
line = lc.getline(funcISC.fileName, returnLineNumber) line = lc.getline(funcISC.fileName, returnLineNumber)
m = re_returnStatement.match(line) m = re_returnStatement.match(line)
if m is not None: if m is not None:
annot_str = 'printf("memAccessCycles = \%lu\\n", memAccessCycles);' annot_str = 'printf("memAccessCycles = \%llu\\n", memAccessCycles);'
annot = Annotation(annot_str, funcISC.fileName, returnLineNumber-1, False) annot = Annotation(annot_str, funcISC.fileName, returnLineNumber-1, False)
addAnnotationToDict(dictAnnotLoadStore, returnLineNumber-1, annot) addAnnotationToDict(dictAnnotLoadStore, returnLineNumber-1, annot)
break break
......
...@@ -12,8 +12,9 @@ all: my_ctop_IR.out ...@@ -12,8 +12,9 @@ all: my_ctop_IR.out
my_ctop_IR.out: $(APP_SOURCES) my_ctop_IR.out: $(APP_SOURCES)
$(CC) $(CFLAGS) $(INCLUDE) $(LIB) -o $@ $^ -lcacheSim $(CC) $(CFLAGS) $(INCLUDE) $(LIB) -o $@ $^ -lcacheSim
check: my_ctop_IR.out
export LD_LIBRARY_PATH=$(CACHESIM_LIB)
./my_ctop_IR.out
clean: clean:
rm -rf *.o cacheSimTest rm -rf *.o my_ctop_IR.out
for f in $(SOURCES); do \
rm -rf $$f; \
done
\ No newline at end of file
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#include "ir2c.h" #include "ir2c.h"
#include "cacheSim.h" #include "cacheSim.h"
extern unsigned long SP; extern unsigned long SP;
extern unsigned long memAccessCycles; extern unsigned long long memAccessCycles;
/*********************************************************** /***********************************************************
Copyright 1992 by Stichting Mathematisch Centrum, Amsterdam, The Copyright 1992 by Stichting Mathematisch Centrum, Amsterdam, The
......
...@@ -213,7 +213,7 @@ mainbb_12: ...@@ -213,7 +213,7 @@ mainbb_12:
// # PRED: 7 [39.0%] (false,exec) 11 [100.0%] (fallthru,exec) // # PRED: 7 [39.0%] (false,exec) 11 [100.0%] (fallthru,exec)
// Simulating I Cache for obj block 11 // Simulating I Cache for obj block 11
memAccessCycles += simICache(0x344, 16); memAccessCycles += simICache(0x344, 16);
printf("memAccessCycles = \%lu\n", memAccessCycles); printf("memAccessCycles = \%llu\n", memAccessCycles);
return 0; return 0;
// # SUCC: EXIT [100.0%] // # SUCC: EXIT [100.0%]
......
...@@ -23,7 +23,7 @@ struct test { ...@@ -23,7 +23,7 @@ struct test {
unsigned int v; unsigned int v;
unsigned int k; unsigned int k;
} m = { 1, 1 }; } m = { 1, 1 };
unsigned long m_addr;
void sieve_func() { void sieve_func() {
int j_76; int j_76;
......
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